Imec and Cascade Microtech develop pre-bond testing system for advanced 3D chips

June 18, 2017
Source: ASM International

Imec, Belgium, and Cascade Microtech, Germany, announce the successful development of a fully automatic system for pre-bond testing of advanced 3D chips. The new system enables probing and thereby testing of chips with large arrays of 40µm-pitch micro-bumps, on 300mm wafers. Imec won the 2017 National Instruments Engineering Impact Award for developing this new tool. 

As an emerging technology, 3D IC stacking still has many open options and technical challenges. One of these challenges is probing of the individual chips, before they are stacked, to ensure a good yield of the 3D stacked ICs. The inter-chip connections of 3D stacked ICs are made by large arrays of fine-pitch micro-bumps, which makes probing these bumps a challenge. Until today, the probing solution was to add dedicated pre-bond probe pads to the to-be-stacked dies, but this requires extra space and design effort, it and increases test time.

Imec and Cascade Microtech have now developed a fully automatic test cell that can provide test access by probing large arrays of fine-pitch micro-bumps. The system is based on a Cascade Microtech CM300 probe station and National Instruments PXI test instrumentation, complemented by in-house developed software for automatic test generation, data analysis, and visualization. The system allows testing of wafers up to 300mm diameter, including thinned wafers on tape frame with exposed through-silicon vias.

After several years of intense collaboration between Imec and Cascade Microtech, partly supported by the EU-funded FP7 SEA4KET project, good results were achieved with Cascade Microtech's Pyramid Probe prototype RBI probe cards on Imec's 300mm wafers with 40µm-pitch micro-bumped chips.

"Imec provided us with unique early insights into the test requirements for 3D ICs, which drove the development of this system," said Jörg Kiesewetter, director of engineering at Cascade Microtech Dresden. "Also the availability of Imec's dedicated micro-bump test wafers has helped us to fine-tune both the probe station and the probe cards for this application."

"At Imec, we are using the system now on a routine basis to test our 40µm-pitch micro-bump wafers," stated Erik Jan Marinissen, principal scientist at Imec. "Like everything in the semiconductor realm, micro-bumps are subject to downscaling. Hence, with Cascade, we have started experiments to also probe our 20µm-pitch micro-bump arrays, and those look promising."

www.imec-int.com  

 

Subject Classifications

Industries and Applications | Electronics

Industries and Applications | Nanotechnology

Materials Testing and Evaluation | Materials Characterization