Planar Deprocessing Of Advanced VLSI Devices

Author: Kendall Scott Wills, Texas Instruments   |   Document Download   |   Product code: ZCP2006ISTFA393

File size: 291 KB

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Modern day VLSI Semiconductor devices are manufactured using a Chemical Mechanical Polish (CMP) process. The resultant layers are planar with respect to one another. In theory, the planar layers should be easy to remove. All that needs to be done is to lap the layer until the region of interest is exposed. In practice lapping back the device to locate a defect has been difficult.

  • From: ISTFA 2006: Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis (ASM International)
  • Published: November 01, 2006
  • Pages: 393 - 397 (5)