{"id":3838,"date":"2019-06-09T21:02:22","date_gmt":"2019-06-09T21:02:22","guid":{"rendered":"https:\/\/staging.asminternational.org\/edfas\/results\/-\/journal_content\/56\/10192\/37478847\/NEWS\/"},"modified":"2023-02-07T04:52:42","modified_gmt":"2023-02-07T04:52:42","slug":"intel-custom-foundry-to-collaborate-with-usc-for-integrated-circuit-design-and-fabrication","status":"publish","type":"post","link":"https:\/\/www.asminternational.org\/edfas\/results\/-\/journal_content\/56\/10192\/37478847\/NEWS\/","title":{"rendered":"Intel Custom Foundry to collaborate with USC for integrated circuit design and fabrication"},"content":{"rendered":"<p style=\"margin-bottom:.0001pt\"><span style=\"line-height:normal\"><span style=\"font-size:12.0pt\">The University of Southern California\u2019s Viterbi Information Sciences Institute (ISI) and Intel Custom Foundry announce a collaboration to design, fabricate, and package integrated circuits through its MOSIS unit. MOSIS (Metal Oxide Semiconductor Implementation Service) provides chip design tools and related services that enable universities, government agencies, research institutes, and businesses to prototype chips efficiently and cost-effectively.<\/span><\/span><\/p>\n<p style=\"margin-bottom:.0001pt\">&nbsp;<\/p>\n<p style=\"margin-bottom:.0001pt\"><span style=\"line-height:normal\"><span style=\"font-size:12.0pt\">The collaboration combines MOSIS&#8217;s industry-leading integrated circuit manufacturing expertise with Intel&#8217;s high-performance complementary metal-oxide semiconductor (CMOS) fabrication and packaging technology. It positions ISI and Intel Custom Foundry (ICF) to lead a new era of high-performance microelectronic manufacturing for the United States and the global IC community. <\/span><\/span><\/p>\n<p style=\"margin-bottom:.0001pt\">&nbsp;<\/p>\n<p style=\"margin-bottom:.0001pt\"><span style=\"line-height:normal\"><span style=\"font-size:12.0pt\">&#8220;This is a significant event for the U.S. microelectronics community,&#8221; said MOSIS co-director John Damoulakis. &#8220;For the first time, the U.S. Government, R&amp;D laboratories, companies, and academia will have access to Intel&#8217;s advanced fabrication and packaging technologies economically through MOSIS.&#8221;<\/span><\/span><\/p>\n<p style=\"margin-bottom:.0001pt\">&nbsp;<\/p>\n<p style=\"margin-bottom:.0001pt\"><span style=\"line-height:normal\"><span style=\"font-size:12.0pt\">The ICF-MOSIS collaboration involves the use of Intel&#8217;s 22nm CMOS FinFET technology to fabricate either digital or analog\/mixed-signal ICs for a variety of applications spanning the digital and RFCMOS domains. <\/span><\/span><\/p>\n<p style=\"margin-bottom:.0001pt\">&nbsp;<\/p>\n<p style=\"margin-bottom:.0001pt\"><span style=\"line-height:normal\"><span style=\"font-size:12.0pt\">Intel&#8217;s 22FFL technology is a unique 22nm FinFET process optimized for logic, RF, and millimeter wave applications supporting superior performance to planar technologies with both ft and fmax above 300 GHz and 450 GHz. The technology combines high-performance, ultra- low-power logic, RF transistors, and single-pattern back-end flow. <\/span><\/span><\/p>\n<p style=\"margin-bottom:.0001pt\">&nbsp;<\/p>\n<p style=\"margin-bottom:.0001pt\"><span style=\"line-height:normal\"><span style=\"font-size:12.0pt\"><a href=\"https:\/\/viterbischool.usc.edu\/news\/\">https:\/\/viterbischool.usc.edu\/news\/<\/a> <\/span><\/span><\/p>\n<p style=\"margin-bottom:.0001pt\">&nbsp;<\/p>\n<p style=\"margin-bottom:.0001pt\"><span style=\"line-height:normal\"><span style=\"font-size:12.0pt\"><a href=\"http:\/\/www.intel.com\/content\/www\/us\/en\/foundry\/design-solutions.html?wapkw=intel+custom+foundry\" target=\"_self\" rel=\"noopener\">http:\/\/www.intel.com\/content\/www\/us\/en\/foundry\/design-solutions.html<\/a>&nbsp;<\/span><\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>The University of Southern California\u2019s Viterbi Information Sciences Institute (ISI) and Intel Custom Foundry announce a collaboration to design, fabricate, and package integrated circuits through its MOSIS unit.<\/p>\n","protected":false},"author":63082,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[434,438,435,436,1],"tags":[],"class_list":["post-3838","post","type-post","status-publish","format-standard","hentry","category-electronics","category-nanotechnology","category-news","category-news-articles","category-uncategorized"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.9 - 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