\n\tA team of researchers at the University of Illinois at Urbana-Champaign has advanced gallium nitride (GaN)-on-silicon transistor technology by optimizing the composition of the semiconductor layers that make up the device. Working with industry partners Veeco and IBM, the team created the high electron mobility transistor (HEMT) structure on a 200-mm silicon substrate with a process that will scale to larger industry-standard wafer sizes.<\/p>\n
\n\tCan Bayram, an assistant professor of electrical and computer engineering (ECE), and his team have created the GaN HEMT structure on a silicon platform because it is compatible with existing CMOS manufacturing processes and is less expensive than other substrate options such as sapphire and silicon carbide.<\/p>\n
\n\tHowever, silicon does have its challenges. Namely, the lattice constant, or space between silicon atoms, does not match up with the atomic structure of the GaN grown on top of it.<\/p>\n