{"id":8546,"date":"2025-01-16T22:59:20","date_gmt":"2025-01-17T03:59:20","guid":{"rendered":"https:\/\/staging.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/"},"modified":"2025-01-17T04:01:45","modified_gmt":"2025-01-17T04:01:45","slug":"synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters","status":"publish","type":"post","link":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/","title":{"rendered":"Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters"},"content":{"rendered":"<p>Synopsys, Inc., Sunnyvale, Calif., announced the industry\u2019s first Ultra Ethernet IP and UALink IP solutions, including controllers, PHYs, and verification IP, to meet the demand for standards-based, high-bandwidth, and low-latency HPC and AI accelerator interconnects.<\/p>\n<p>As hyperscale data center infrastructures evolve to support the processing of trillions of parameters in large language models, they must scale to hundreds of thousands of accelerators with highly efficient and fast connections. Synopsys Ultra Ethernet and UALink IP will provide a holistic, low-risk solution for high-speed and low-latency communication to scale-up and scale-out AI architectures.<\/p>\n<p>\u201cFor more than 25 years, Synopsys has been at the forefront of providing best-in-class IP solutions that enable designers to accelerate the integration of standards-based functionality,\u201d said Neeraj Paliwal, senior vice president of IP product management at Synopsys. \u201cWith the industry\u2019s first Ultra Ethernet and UALink IP, companies can get a head start on developing a new generation of high-performance chips and systems with broad interoperability to scale future AI and HPC infrastructure.\u201d<\/p>\n<p>Advanced capabilities of the new Synopsys Ultra Ethernet IP solution include:<\/p>\n<ul>\n<li>IP solution to scale out backend networks: Consisting of PHY, MAC and PCS controller, and verification IP, the Synopsys Ultra Ethernet IP solution offers a low-risk path for designers developing systems that can support up to one million endpoints in a single network.<\/li>\n<li>Best-in-class 224G Ethernet PHY IP: The silicon-proven Synopsys 224G Ethernet PHY IP, which supports the Ultra Ethernet protocol, has demonstrated broad interoperability as shown at multiple tradeshows including ECOC, OFC, and DesignCon.<\/li>\n<li>Patented error correction implementation: The Synopsys Ultra Ethernet MAC and PCS controller IP provides up to 1.6 Tbps of bandwidth with ultra-low latency, enabling the real-time processing needed for AI workloads.<\/li>\n<li>Seamless integration: The MAC and PCS IP support an interface to the higher layers of the Ultra Ethernet stack providing a full silicon implementation for switches, AI accelerators and smart NICs.<\/li>\n<li>Accelerated verification and validation: The Synopsys Ultra Ethernet verification IP helps ensure protocol adherence to rapidly evolving standards, enabling faster and more efficient validation of AI and HPC systems.<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p>Advanced capabilities of the new Synopsys UALink IP solution include:<\/p>\n<ul>\n<li>IP solution to scale up computing fabrics: Consisting of PHY, controller, and verification IP, the Synopsys UALink IP solution speeds time-to-market for designers developing systems that can support up to 1,024 AI accelerators.<\/li>\n<li>Efficient, high-speed data transfers: Engineered for data-intensive AI workloads, the low-power and high-bandwidth Synopsys UALink PHY IP provides 200 Gbps per lane.<\/li>\n<li>Latency-optimized with memory sharing capabilities: Synopsys UALink Controller IP helps mitigate critical bottlenecks of AI hardware infrastructure via shared memory access from accelerator to accelerator.<\/li>\n<li>Built-in protocol checks: The Synopsys UALink Verification IP, combined with Synopsys hardware-assisted verification solutions, provides quick and reliable verification for AI hardware.<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p>\u201cSynopsys has decades of expertise in contributing to the industry\u2019s essential interconnect standards and in delivering widely adopted high-speed interface IP,\u201d said Kurtis Bowman, chairperson of the board at UALink Consortium. \u201cWe appreciate Synopsys\u2019 commitment to enabling UALink IP to create a scalable, high-performance data center ecosystem for designers to meet the growing demands of AI models.\u201d<\/p>\n<p>Additional industry leaders collaborate with Synopsys to enable AI Accelerator Interconnects at scale. \u201cAdvancing AI technology requires industry-wide efforts to create high-performance solutions essential for the future of data centers,\u201d said Robert Hormuth, corporate vice president, architecture and strategy, data center solutions group at AMD. \u201cThe introduction of Synopsys\u2019 Ultra Ethernet and UALink IP, alongside AMD high-performance processors, highlights the commitment to create an open, robust, and scalable ecosystem for large-scale AI and high-performance computing.\u201d<\/p>\n<p>\u201cThe progress of AI technology relies on industry collaboration to deliver scalable and power-efficient high-performance accelerator fabrics,\u201d said Chris Petersen, fellow, technology and ecosystems at Astera Labs. \u201cNew interconnect technologies such as UALink will help support the rapid growth and complexity of AI and HPC workloads. We congratulate Synopsys on the delivery of its new IP solutions to enable this critical connectivity ecosystem.\u201d<\/p>\n<p>\u201cParticipating in defining and developing an open standards-based AI systems communications is an important part of Tenstorrent\u2019s charter. The low latencies and high bandwidths of the upcoming UEC and UALink standards will enable ultra-efficient interfaces supporting AI compute with multi-trillion parameter models,\u201d said David Bennett, chief customer officer at Tenstorrent. \u201cTenstorrent\u2019s RISC-V chips and Synopsys\u2019 new UALink and Ultra Ethernet IP will enable the largest AI accelerator clusters.\u201d<\/p>\n<p>&nbsp;<\/p>\n<p>Image &#8211; <em>Synopsys Announces Industry\u2019s First Ultra Ethernet and UALink IP Solutions to Connect Massive AI Accelerator Clusters.<\/em><\/p>\n<p>&nbsp;<\/p>\n<p>For more information:<\/p>\n<p>Synopsys, Inc.<\/p>\n<p><a href=\"https:\/\/www.synopsys.com\/\">https:\/\/www.synopsys.com\/<\/a><\/p>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Synopsys, Inc., Sunnyvale, Calif., announced the industry\u2019s first Ultra Ethernet IP and UALink IP solutions, including controllers, PHYs, and verification IP, to meet the demand for standards-based, high-bandwidth, and low-latency HPC and AI accelerator interconnects. <\/p>\n","protected":false},"author":63245,"featured_media":8552,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[434,501,444,435,436,463],"tags":[],"class_list":["post-8546","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-electronics","category-electronics-and-microelectronics","category-industries-and-applications","category-news","category-news-articles","category-processes"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.9 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters - Electronic Device Failure Analysis Society<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, 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content=\"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/\" \/>\n<meta property=\"og:site_name\" content=\"Electronic Device Failure Analysis Society\" \/>\n<meta property=\"article:published_time\" content=\"2025-01-17T03:59:20+00:00\" \/>\n<meta property=\"article:modified_time\" content=\"2025-01-17T04:01:45+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.asminternational.org\/app\/uploads\/sites\/41\/2025\/01\/EDFAS__012325__Synopsys__250-1.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"250\" \/>\n\t<meta property=\"og:image:height\" content=\"329\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"Debbie Sniderman\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"Debbie 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clusters\",\"datePublished\":\"2025-01-17T03:59:20+00:00\",\"dateModified\":\"2025-01-17T04:01:45+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/\"},\"wordCount\":767,\"publisher\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/#organization\"},\"image\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/cdn-prd-main.asm-media.cloud\\\/uploads\\\/sites\\\/41\\\/2025\\\/01\\\/EDFAS__012325__Synopsys__250-1-3.jpg\",\"articleSection\":[\"Electronics\",\"Electronics and Microelectronics\",\"Industries and Applications\",\"news\",\"News Articles\",\"Processes\"],\"inLanguage\":\"en-US\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/\",\"url\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/\",\"name\":\"Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters - Electronic Device Failure Analysis Society\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/cdn-prd-main.asm-media.cloud\\\/uploads\\\/sites\\\/41\\\/2025\\\/01\\\/EDFAS__012325__Synopsys__250-1-3.jpg\",\"datePublished\":\"2025-01-17T03:59:20+00:00\",\"dateModified\":\"2025-01-17T04:01:45+00:00\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/#primaryimage\",\"url\":\"https:\\\/\\\/cdn-prd-main.asm-media.cloud\\\/uploads\\\/sites\\\/41\\\/2025\\\/01\\\/EDFAS__012325__Synopsys__250-1-3.jpg\",\"contentUrl\":\"https:\\\/\\\/cdn-prd-main.asm-media.cloud\\\/uploads\\\/sites\\\/41\\\/2025\\\/01\\\/EDFAS__012325__Synopsys__250-1-3.jpg\",\"width\":250,\"height\":329},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/#website\",\"url\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/\",\"name\":\"Electronic Device Failure Analysis Society\",\"description\":\"Electronic Device Failure Analysis Society\",\"publisher\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Organization\",\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/#organization\",\"name\":\"Electronic Device Failure Analysis Society\",\"url\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/#\\\/schema\\\/logo\\\/image\\\/\",\"url\":\"https:\\\/\\\/cdn-prd-main.asm-media.cloud\\\/uploads\\\/sites\\\/41\\\/2022\\\/10\\\/layout_set_logo.png\",\"contentUrl\":\"https:\\\/\\\/cdn-prd-main.asm-media.cloud\\\/uploads\\\/sites\\\/41\\\/2022\\\/10\\\/layout_set_logo.png\",\"width\":360,\"height\":95,\"caption\":\"Electronic Device Failure Analysis Society\"},\"image\":{\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/#\\\/schema\\\/logo\\\/image\\\/\"}},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/#\\\/schema\\\/person\\\/135b2d8ac98a363d0bd9ec033a2904ad\",\"name\":\"Debbie Sniderman\",\"url\":\"https:\\\/\\\/www.asminternational.org\\\/edfas\\\/author\\\/dsniderman\\\/\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters - Electronic Device Failure Analysis Society","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/","og_locale":"en_US","og_type":"article","og_title":"Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters - Electronic Device Failure Analysis Society","og_description":"Synopsys, Inc., Sunnyvale, Calif., announced the industry\u2019s first Ultra Ethernet IP and UALink IP solutions, including controllers, PHYs, and verification IP, to meet the demand for standards-based, high-bandwidth, and low-latency HPC and AI accelerator interconnects.","og_url":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/","og_site_name":"Electronic Device Failure Analysis Society","article_published_time":"2025-01-17T03:59:20+00:00","article_modified_time":"2025-01-17T04:01:45+00:00","og_image":[{"width":250,"height":329,"url":"https:\/\/www.asminternational.org\/app\/uploads\/sites\/41\/2025\/01\/EDFAS__012325__Synopsys__250-1.jpg","type":"image\/jpeg"}],"author":"Debbie Sniderman","twitter_card":"summary_large_image","twitter_misc":{"Written by":"Debbie Sniderman","Est. reading time":"4 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/#article","isPartOf":{"@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/"},"author":{"name":"Debbie Sniderman","@id":"https:\/\/www.asminternational.org\/edfas\/#\/schema\/person\/135b2d8ac98a363d0bd9ec033a2904ad"},"headline":"Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters","datePublished":"2025-01-17T03:59:20+00:00","dateModified":"2025-01-17T04:01:45+00:00","mainEntityOfPage":{"@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/"},"wordCount":767,"publisher":{"@id":"https:\/\/www.asminternational.org\/edfas\/#organization"},"image":{"@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/#primaryimage"},"thumbnailUrl":"https:\/\/cdn-prd-main.asm-media.cloud\/uploads\/sites\/41\/2025\/01\/EDFAS__012325__Synopsys__250-1-3.jpg","articleSection":["Electronics","Electronics and Microelectronics","Industries and Applications","news","News Articles","Processes"],"inLanguage":"en-US"},{"@type":"WebPage","@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/","url":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/","name":"Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters - Electronic Device Failure Analysis Society","isPartOf":{"@id":"https:\/\/www.asminternational.org\/edfas\/#website"},"primaryImageOfPage":{"@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/#primaryimage"},"image":{"@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/#primaryimage"},"thumbnailUrl":"https:\/\/cdn-prd-main.asm-media.cloud\/uploads\/sites\/41\/2025\/01\/EDFAS__012325__Synopsys__250-1-3.jpg","datePublished":"2025-01-17T03:59:20+00:00","dateModified":"2025-01-17T04:01:45+00:00","breadcrumb":{"@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/"]}]},{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/#primaryimage","url":"https:\/\/cdn-prd-main.asm-media.cloud\/uploads\/sites\/41\/2025\/01\/EDFAS__012325__Synopsys__250-1-3.jpg","contentUrl":"https:\/\/cdn-prd-main.asm-media.cloud\/uploads\/sites\/41\/2025\/01\/EDFAS__012325__Synopsys__250-1-3.jpg","width":250,"height":329},{"@type":"BreadcrumbList","@id":"https:\/\/www.asminternational.org\/edfas\/synopsys-announces-industrys-first-ultra-ethernet-and-ualink-ip-solutions-to-connect-massive-ai-accelerator-clusters\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/www.asminternational.org\/edfas\/"},{"@type":"ListItem","position":2,"name":"Synopsys announces industry\u2019s first Ultra Ethernet and UALink IP solutions to connect massive AI accelerator clusters"}]},{"@type":"WebSite","@id":"https:\/\/www.asminternational.org\/edfas\/#website","url":"https:\/\/www.asminternational.org\/edfas\/","name":"Electronic Device Failure Analysis Society","description":"Electronic Device Failure Analysis Society","publisher":{"@id":"https:\/\/www.asminternational.org\/edfas\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/www.asminternational.org\/edfas\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Organization","@id":"https:\/\/www.asminternational.org\/edfas\/#organization","name":"Electronic Device Failure Analysis Society","url":"https:\/\/www.asminternational.org\/edfas\/","logo":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/www.asminternational.org\/edfas\/#\/schema\/logo\/image\/","url":"https:\/\/cdn-prd-main.asm-media.cloud\/uploads\/sites\/41\/2022\/10\/layout_set_logo.png","contentUrl":"https:\/\/cdn-prd-main.asm-media.cloud\/uploads\/sites\/41\/2022\/10\/layout_set_logo.png","width":360,"height":95,"caption":"Electronic Device Failure Analysis Society"},"image":{"@id":"https:\/\/www.asminternational.org\/edfas\/#\/schema\/logo\/image\/"}},{"@type":"Person","@id":"https:\/\/www.asminternational.org\/edfas\/#\/schema\/person\/135b2d8ac98a363d0bd9ec033a2904ad","name":"Debbie Sniderman","url":"https:\/\/www.asminternational.org\/edfas\/author\/dsniderman\/"}]}},"acf":[],"_links":{"self":[{"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/posts\/8546","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/users\/63245"}],"replies":[{"embeddable":true,"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/comments?post=8546"}],"version-history":[{"count":2,"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/posts\/8546\/revisions"}],"predecessor-version":[{"id":8551,"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/posts\/8546\/revisions\/8551"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/media\/8552"}],"wp:attachment":[{"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/media?parent=8546"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/categories?post=8546"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.asminternational.org\/edfas\/wp-json\/wp\/v2\/tags?post=8546"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}