Dow Corning, Midland, Mich., announces that it is among the newest members of Imec, San Francisco. One of the key challenges is the bonding of the device wafer to a carrier wafer prior to wafer thinning, and the safe debonding of the thin wafer after completion of backside processing. This was Dow Corning’s goal when designing its temporary bonding solution, aimed at simple processing with a bi-layer concept comprising an adhesive and a release layer. The Dow Corning technology also enables room-temperature bonding and debonding processes based on standard manufacturing methods.
Together with Imec, Dow Corning will explore its temporary bonding CMOS-compatible solution for 3D through-silicon-via (TSV) semiconductor packaging. The collaboration will aim to further expand the technology’s ability to achieve simple, cost-effective bonding-debonding techniques compatible with standard manufacturing processes.
Both organizations will combine their expertise toward the development and broader adoption of 3D integrated circuit packaging technologies, in which chips are stacked in vertical 3D architectures. By integrating multiple chips into a single package, 3D IC technology promises to reduce form factor and power consumption, and increase bandwidth to enable more efficient inter-chip communication for next-generation microelectronics devices. Yet, before 3D IC fabrication can see broader adoption, it will require innovative advances in materials and processing technologies.
