Cadence Design Systems, San Jose, Calif., introduces the Modus Test Solution, a product that reportedly enables design engineers to reduce test time by up to a factor of three, thereby reducing production test cost and increasing silicon profit margins.
Soitec announces volume manufacturing of 300mm RF-SOI substrates
Soitec, France, has begun mass production of 300mm radio-frequency silicon-on-insulator (RF-SOI) substrates for mobile communications.
Suny Polytechnic and Global Foundries establish $500 million EUV program
Suny Polytechnic and Global Foundries establish $500 million EUV program
ASM Phoenix Chapter Leadership
Phoenix Chapter Leadership If you are interested in becoming a member of this chapter or have chapter-specific questions, please try contacting the Chapter Chair or Membership Chair. /web/phoenix-chapter Email Chapter Leadership Paul Keiser Chapter Chair Orbital ATK Scotsdale, AZ 85250-7351 [email protected] Prabir K. Chaudhury Vice Chair Exova Phoenix, AZ 85045-2284 [email protected] Mr. Richard M. Boxwell Secretary […]




