Directed self-assembly developed to advance semiconductor manufacturing
March 24, 2014 Source:
Semiconductor Research Corporation (SRC), Research Triangle Park, N.C., announces that researchers it sponsors at the Massachusetts Institute of Technology have introduced new directed self-assembly (DSA) techniques that promise to help semiconductor manufacturers develop more advanced and less expensive components. The MIT research focuses on the issue of next-generation lithography in the semiconductor manufacturing process.
Photolithography at a 193 nanometer (nm) wavelength is currently used for semiconductor device manufacturing, but that is reaching its limit with feature sizes around 25 nm. Electron-beam lithography can produce smaller features and is used for mask making, one of the critical steps in semiconductor manufacturing. However, the throughput of electron-beam lithography is currently insufficient for sub-20 nm resolution patterning over large areas.
The MIT study demonstrates that complex patterns of lines, bends and junctions with feature sizes below 20 nm can be made by block copolymer self-assembly guided by a greatly simplified template. This study explained how to design the template to achieve a desired pattern. Electron-beam lithography was used to produce the template serially, while the block copolymer filled in the rest of the pattern in a parallel process. This hybrid process can be five or more times faster than writing the entire pattern by electron beam lithography.
The MIT study developed a simple way to design a template to achieve a specific block copolymer pattern over a large area. Although electron-beam lithography defines the template, other methods such as photolithography with trimming could be used to produce the templates.
Semiconductor Research Corporation (SRC), Research Triangle Park, N.C., announces that researchers it sponsors at the Massachusetts Institute of Technology have introduced new directed self-assembly (DSA) techniques that promise to help semiconductor manufacturers develop more advanced and less expensive components. The MIT research focuses on the issue of next-generation lithography in the semiconductor manufacturing process.
Photolithography at a 193 nanometer (nm) wavelength is currently used for semiconductor device manufacturing, but that is reaching its limit with feature sizes around 25 nm. Electron-beam lithography can produce smaller features and is used for mask making, one of the critical steps in semiconductor manufacturing. However, the throughput of electron-beam lithography is currently insufficient for sub-20 nm resolution patterning over large areas.
The MIT study demonstrates that complex patterns of lines, bends and junctions with feature sizes below 20 nm can be made by block copolymer self-assembly guided by a greatly simplified template. This study explained how to design the template to achieve a desired pattern. Electron-beam lithography was used to produce the template serially, while the block copolymer filled in the rest of the pattern in a parallel process. This hybrid process can be five or more times faster than writing the entire pattern by electron beam lithography.
The MIT study developed a simple way to design a template to achieve a specific block copolymer pattern over a large area. Although electron-beam lithography defines the template, other methods such as photolithography with trimming could be used to produce the templates.
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