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NSF and partners invest $45 million in the future of semiconductors

The U.S. National Science Foundation announced 24 research and education projects with a total investment of $45.6 million — including funding from the “CHIPS and Science Act of 2022” — to enable rapid progress in new semiconductor technologies and manufacturing as well as workforce development. The projects are supported by the NSF Future of Semiconductors (FuSe) program through a public-private partnership spanning NSF and four companies: Ericsson, IBM, Intel, and Samsung.

“Our investment will help train the next generation of talent necessary to fill key openings in the semiconductor industry and grow our economy from the middle out and bottom up,” said NSF director Sethuraman Panchanathan. “By supporting novel, transdisciplinary research, we will enable breakthroughs in semiconductors and microelectronics and address the national need for a reliable, secure supply of innovative semiconductor technologies, systems and professionals.”

Future semiconductors and microelectronics will require a broad coalition of science and engineering talent in academic and industrial sectors to pursue holistic, “co-design” approaches that advance materials, devices, and systems integration. Co-design approaches simultaneously consider the performance, manufacturability, recyclability and environmental sustainability of such materials, devices, and systems.

The FuSe program will accelerate the development of the U.S.-based workforce and knowledge that enable innovative semiconductor and microelectronics — in direct alignment with the goals of the “CHIPS and Science Act of 2022.”

The FuSe investment for Fiscal Year 2023 supports 24 research and education projects through 61 awards to 47 institutions, including eight to minority-serving institutions and seven to NSF Established Program to Stimulate Competitive Research (EPSCoR) jurisdictions, and addresses three research topics:

Topic 1: Collaborative Research in Domain-Specific Computing

  • Bio-Inspired Sensorimotor Control for Robotic Locomotion with Neuromorphic Architectures Using Beyond-CMOS Materials and Devices
    University of Pittsburgh
  • Co-designing Continual-Learning Edge Architectures with Hetero-Integrated Silicon-CMOS and Electrochemical Random-Access Memory
    University of Illinois at Urbana-Champaign
  • Efficient Situation-Aware AI Processing in Advanced 2-Terminal SOT-MRAM
    Arizona State University, Duke University, Stanford University
  • Enabling Photonic Computing Engines through Hetero-Integration
    Queen’s College
  • Metaoptics-Enhanced Vertical Integration for Versatile In-Sensor Machine Vision
    Washington University in St. Louis, University of Illinois at Urbana-Champaign, University of Rochester.
  • A Reconfigurable Ferroelectronics Platform for Collective Computing
    University of Virginia, Georgia Institute of Technology
  • Retunable, Reconfigurable, Racetrack-Memory Acceleration Platform
    University of Pittsburgh, Northwestern University, University of California Los Angeles, The University of Texas at San Antonio

 

Topic 2: Advanced Function and High Performance by Heterogeneous Integration

  • Co-designed Systems for In-sensor Processing with Sustainable Nanomaterials
    Duke University
  • Collaborative Optically Disaggregated Arrays of Extreme-MIMO Radio Units
    University of California, Berkeley, Boston University, University of California Los Angeles
  • Deep Learning and Signal Processing Using Silicon Photonics and Digital CMOS Circuits for Ultra-Wideband Spectrum Perception
    Florida International University, Northeastern University, University of Arkansas, University of Delaware
  • Electronic-Photonic Heterogeneous Integration for Sensing Above 1 THz
    University of California Los Angeles
  • Heterogeneous Integration in Power Electronics for High-Performance Computing
    Northeastern University, Cornell University
  • Indium Selenides Based Back End of Line Neuromorphic Accelerators
    The Pennsylvania State University, University of Pennsylvania, Yale University
  • Monolithic 3D Integration (M3D) of 2D Materials-Based CFET Logic Elements towards Advanced Microelectronic
    Washington University in St. Louis, Massachusetts Institute of Technology, University of California Los Angeles, The University of Texas at Austin
  • Substrate-Inverted Multi-Material Integration Technology
    Massachusetts Institute of Technology, Dartmouth, University of Delaware
  • Thermal Co-Design for Heterogeneous Integration of Low Loss Electromagnetic and RF Systems
    Oregon State University, Florida International University, University of South Florida

 

Topic 3: New Materials for Energy Efficient, Enhanced-Performance and Sustainable Semiconductor-Based Systems

  • GeSnO2 Alloys for Next-Generation Semiconductor Devices
    University of Michigan-Ann Arbor, University of Minnesota Twin Cities
  • Heterogeneous Integration of III-Nitride and Boron Arsenide for Enhanced Thermal and Electronic Performance
    The University of Texas at Austin, The Ohio State University, University of Michigan-Ann Arbor, The University of Texas at Dallas
  • High-throughput Discovery of Phase Change Materials for Co-designed Electronic and Optical Computational Devices (PHACEO)
    University of Maryland, College Park, Howard University, Massachusetts Institute of Technology, University of Washington in Seattle
  • Interconnects with Co-Designed Materials, Topology, and Wire Architecture
    Rensselaer Polytechnic Institute, Cornell University, University of Notre Dame
  • Polymer SWIR Photodiodes for Focal Plane Arrays
    North Carolina State University, University of North Carolina at Chapel Hill
  • Precise Sequence Specific Block Copolymers for Directed Self-Assembly – Co-design of Lithographic Materials for Pattern Quality, Scaling and Manufacturing
    The University of Chicago
  • Spin Gapless Semiconductors and Effective Spin Injection Design for Spin-Orbit Logic
    University of Cincinnati, Illinois Institute of Technology, Iowa State University, Northern Illinois University, The University of Alabama
  • Ultra-Low-Energy Logic-in-Memory Computing Using Multiferroic Spintronics
    Rice University

 

In addition to significant investment by NSF, including leveraging the $200 million appropriated by the “CHIPS and Science Act of 2022” for a CHIPS for America Workforce and Education Fund, these awards will be supported in part by Ericsson, IBM, Intel, and Samsung, which have committed to providing annual contributions through NSF.

This public-private partnership will help to inform research needs, spur breakthroughs, accelerate technology translation to the market and prepare the future workforce through practical experiences, while addressing the growing demand for semiconductors in the U.S.

In January 2023, NSF announced the partnership with Ericsson, IBM, Intel and Samsung to support the future of semiconductor design and manufacturing. This partnership expands upon recent NSF investments to train and build a diverse semiconductor manufacturing workforce in the U.S. Since 2022, NSF has announced other semiconductor workforce development opportunities — including a partnership with the Semiconductor Research Corporation, a $10 million funding opportunity with Intel Corporation and a $10 million partnership with Micron Technology Inc.

Image – Technicians in a clean room at the U.S. National Science Foundation’s Northeast Advanced Technological Education Center learn how to operate the equipment used to make semiconductors. Technicians load 300mm front Opening Universal Pods (FOUP) onto a tool at SUNY Polytechnic Institute’s semiconductor fabrication facility. Courtesy of: ATE Impacts 2022-2023.

 

For more information:

CHIPS and Science Act of 2022

https://new.nsf.gov/chips

 

National Science Foundation

https://www.nsf.gov/

 

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