ISTFA 2026

San Antonio, Texas

October 4 – 8, 2026

Call for Abstracts

Extended Deadline for Abstract Submissions: NOW CLOSED

Come to share your experiences and advance the industry and your career at the International Symposium for Testing and Failure Analysis, the premier event for the microelectronics failure analysis community. We invite you to submit your work for publication and to present it to the community in Pasadena, California, for the 52nd year of ISTFA.

• Original, unpublished, and novel material is being solicited on testing, analysis, characterization, and metrology of electronic devices and systems from the nanoscale and upward.

• Case studies, review papers, and non-commercial work from vendors are encouraged.

Paper selection is based entirely on information submitted in abstracts and will be evaluated on novelty, completeness, quality, and benefit to the FA community. Abstracts should be a minimum of two pages long, including images and figures. References are required.

        

Technical Program Deadlines

Abstract Submission Deadline:		Friday, April 3, 2026
Accept/Reject Notification to Authors:		Friday, May 1, 2026
Manuscript – First Draft Submitted by Author:		Friday, May 29, 2026
Manuscript – Reviewer Feedback to Authors:		Friday, June 12, 2026
Manuscript – Final PDF Deadline:		Friday, June 26, 2026
Presentation – First Draft from Authors:		Monday, July 13, 2026
Presentation – Reviewer Feedback to Authors, if needed:		Monday, July 27, 2026
Presentation – Final Approval by Reviewers/Mentors:		Monday, August 10, 2026
AV Chair Review Period		August 10 – August 30, 2026
AV Chair Review Deadline		Sunday, August 30, 2026

       

Original, unpublished abstracts are solicited in the following topic areas:

Focus Topics

• AI Applications for Failure Analysis
• Design for Analysis, Test and Diagnostics
• Device Analysis – Case Studies
• Die Level Fault Isolation
• Emerging FA Techniques and Concepts
• FA at the Next Level, Boards and Systems
• FA Process: Fault Isolation, Mechanisms & Solutions
• FIB Sample Preparation & Circuit Edit
• Hardware Security and Counterfeiting
• Microscopy Analysis and Material Characterization
• More than Moore: Integrating New Functions into Nano-Electronics
• Nanoprobing & Electrical Characterization
• Package Level Fault Isolation
• Power Devices (Si, SiC, GaN)
• Sample Preparation and Device De-processing
• Scanning Probe Analysis
• System in Package and 3D Devices

*To maintain the integrity of ISTFA, please obtain pre-approval to present your work at the conference before submitting your abstract.  All costs associated with your participation will be at your expense (travel, housing, and registration fee).