A working transistor requires an extremely thin insulating layer known as the gate dielectric. This layer sits above the semiconductor and helps control the movement of electrons. As transistors shrink, making this insulating layer thinner can improve electrical control. The difficulty is that adding such layers to atomically thin semiconductors can disturb the delicate interface between the materials. That disruption can scatter electrons and erase some of the performance gains engineers are trying to achieve.

For years, researchers have therefore faced a difficult tradeoff. They could strengthen control over the transistor gate, or they could protect the mobility of the charge carriers moving through the device. Achieving both at once has been much harder.

Researchers at National Yang Ming Chiao Tung University (NYCU), Taiwan, working with TSMC Corporate Research, Taiwan, have now demonstrated a new way to address this problem by focusing on the interface itself.

The work, published in Nature Electronics, shows that carefully controlling the atomic boundary between a semiconductor and its insulating layer can allow the dielectric to be made extremely thin while maintaining strong electrical performance. Rather than searching for a completely different semiconductor, the researchers concentrated on the narrow region where the two materials meet, an area only a few atoms thick.

Instead of changing either the semiconductor or the gate dielectric, the NYCU researchers redesigned the interface connecting them.

The team first placed an ultrathin epitaxial aluminum layer directly onto monolayer molybdenum disulfide (MoS2). They then carefully oxidized the aluminum, producing an aluminum oxide layer about 0.42 nanometers thick. After that, they added the high κ hafnium oxide gate dielectric.

Despite being only a fraction of a nanometer thick, the engineered interface performs two important jobs.

First, it creates a smooth and continuous surface that allows the hafnium oxide to grow more uniformly over the MoS2. Second, it works as an atomic buffer that limits unwanted electrical interactions between the dielectric and the semiconductor. This protection helps electrons continue moving efficiently through the transistor channel.

In this design, the interface does more than simply keep two materials apart. It becomes a functional part of the transistor and helps the materials work together more effectively.
Using the new interface design, the researchers fabricated short-channel top-gate transistors from CVD-grown monolayer MoS2. The devices had an equivalent oxide thickness of roughly one nanometer.

Testing showed low leakage current, minimal hysteresis, and maximum transconductance of 0.45 mS μm-1 in transistors with channels measuring about 100 nanometers.

More importantly, the devices demonstrated a combination that has been difficult to achieve in atomically thin transistors: very thin dielectric scaling, strong electrostatic control, and sustained carrier transport.

Because the researchers used CVD-grown monolayer MoS2 rather than mechanically exfoliated flakes, they believe the approach brings the technology closer to materials and processes that could eventually be suitable for wafer-scale manufacturing.

The findings also point to a broader change in the way semiconductor researchers think about transistor design.

For decades, much of the effort to improve transistors has centered on discovering better semiconductor materials or making devices smaller. As transistor components approach atomic dimensions, however, the interfaces separating different materials become increasingly important.

These regions may be only a few atoms thick, yet they can strongly influence how well the materials on either side work together. The new results add to growing evidence that controlling these atomic interfaces could become as important as developing new semiconductor materials themselves.

Image – Researchers from NYCU and TSMC show that redefining the atomic boundary between materials can address a major engineering barrier restricting the development of next-generation semiconductor devices. Courtesy of: Springer Nature.

For more information:

National Yang Ming Chiao Tung University
https://www.nycu.edu.tw/nycu/en/index